Real-Time FPGA Implementation of FIR Filter Using OpenCL Design

Penulis: Yoshiki Yamaguchi

This paper proposes the implementation of a real-time finite impulse response (FIR) filter with a field-programmable gate array (FPGA) and Open Computing Language (OpenCL) designed by directly streaming the input signal. OpenCL is selected for its high productivity to reduce the time of development. It also has a high-level abstraction of the code to avoid users from writing the HDL code, platform-specific tools, and their libraries. Moreover, it is a C-based programming language for parallel programming which is especially employed in high-performance computing. However, OpenCL for FPGA does not give access to directly read/write signals to the FPGA I/O pins. For this study, FPGA requires to access the external analog-to-digital converter (ADC) and digital-to-analog (DAC) to read and write the analog signal for filtering. To resolve the limitation of the OpenCL standard in accessing the FPGA I/O pins, we introduced a novel design in the OpenCL framework through the development of new OpenCL components in reference to the Avalon-Streaming interface. Using OpenCL kernel, these components allow real-time signal streaming from ADC to DAC chips via FPGA directly for signal filtering. The experiment demonstrates that FPGA uses the OpenCL kernel to perform the filtering. Moreover, the same OpenCL kernel can be used for various filter implementations including high-pass filter, low-pass filter, band-pass filter, and band-stop filter without reprogramming the FPGA.

Journal of Signal Processing Systems

DOI: https://doi.org/10.1007/s11265-021-01723-6

No. Arsip : LIPI-20220111